1. Field of the Invention
The present invention relates to a synchronous processing device in a multi-scan display device compatible with a plurality of horizontal and vertical synchronizing frequencies, such as a monitor or projector device.
2. Description of the Related Art
As a result of the recent remarkable progress in telecommunication techniques, a variety of new media of radio and wired types are coming along. A high-definition television receiver with high image quality having an aspect ratio of 16:9 and a wide television receiver of an aspect ratio of 16:9 (EDTV-II) have become widespread.
On the other hand, as information apparatuses such as computers get into widespread use, graphics images, moving pictures and character information of CD-ROM, internet, etc. have come to be displayed for use on television receivers.
As is well known in the art, such image signal sources have various horizontal and vertical synchronizing frequencies (for example, horizontal frequencies of 15.about.135 KHZ). For such image signal sources, a multi-scan display device compatible with a plurality of horizontal and vertical synchronizing frequencies are used. In a multi-signal into voltage, a vertical oscillation circuit 6, etc.
The operation of the horizontal synchronous processing device of FIG. 6A will be described. An input horizontal synchronizing signal is supplied in parallel to the phase comparator 2 and the FV conversion circuit 1a. The phase comparator 2 performs phase comparison of the input horizontal synchronizing signal with the signal fed back from the horizontal oscillation circuit 4 controlled by the FV conversion circuit 1a. This comparison output is integrated by the integrator 3, and supplied to the horizontal oscillation circuit 4 on the output side as a control signal. The horizontal oscillation circuit 4 is connected to the above-mentioned FV conversion circuit 1a and is supplied with a frequency control voltage from the FV conversion circuit 1a, whereby the freerunning frequency of the horizontal oscillation circuit 4 is controlled.
In the vertical synchronous processing device of FIG. 6B, an input vertical synchronous signal frequency is supplied to the vertical FV conversion circuit 5a, and a predetermined control voltage is supplied to the vertical oscillation circuit 6, whereby the freerunning frequency of the vertical oscillation circuit 6 is controlled.
Here, the principle of the FV conversion circuit will be described. The FV conversion circuit obtains a voltage integral after shaping an input signal pulse into a pulse of a fixed width by a monostable multivibrator (not shown) or the like, and in principle has characteristics faithfully proportional to the input frequency. Thus, when the oscillation frequency of the horizontal and vertical oscillation circuits have characteristics proportional to the control voltage, it is possible to cause the oscillation frequency to respond to the input synchronizing frequency in a satisfactory manner by this construction. However, an automatic synchronous control circuit using such an FV conversion circuit has potentially a problem in that the control becomes unstable depending upon the noise components contained in the input signal. That is, in a standard television signal source (such as NTSC or PAL) for television broadcasting, VTR, etc., there is a possibility that noises are contained in the signal source since radio waves, video tapes, etc. are used. In the case of such a signal source, a stable synchronous output cannot be obtained by the automatic synchronous control circuit as described above. In view of this, in conventional synchronous processing devices, an automatic synchronous control circuit such as an FV conversion circuit is not used when reproducing a standard television signal; instead, the control voltage to be supplied to the oscillator is switched to a fixed voltage for television signals. Next, a synchronous control device in which such measures are taken will be described.
The construction of a second example of the conventional synchronous processing device will be described with reference to FIG. 7. FIG. 7 is a block diagram showing a second example of the conventional synchronous processing device.
In addition to the horizontal synchronous control circuit 1, the phase comparator 2, the integrator 3 and the horizontal oscillation circuit 4, which are components of the first example of the conventional device, the device shown in FIG. 7 further comprises a voltage generation circuit 7 for generating a fixed voltage for television, a switching device 8 for selectively switching the output of the horizontal synchronous control circuit 1 and that of the voltage generation circuit 7 in response to an input source switching signal, etc.
When reproducing a standard television signal source such as television broadcasting or VTR, switching is effected by the switching device 8 to the fixed voltage for television generated in the voltage generation circuit 7. In the case of a non-standard television signal source (e.g., a graphics image signal of a computer or the like or a high-definition television signal), the control voltage generated by the above-mentioned horizontal synchronous circuit 1 is supplied. In this way, the control voltage supplied to the horizontal oscillation circuit 4 is selected by the switching device 8, so that, when reproducing a standard television signal source, the control voltage supplied to the horizontal oscillation circuit 4 is fixed to an optimum value for television, and there is no fear of the synchronous control becoming unstable due to the influence of noises, etc.
Further, in conventional synchronous processing devices, a method is sometimes used in which the oscillation circuit is controlled by an AFC circuit similar to a television receiver. However, the frequency drawing width due to the AFC circuit is only several % or so, so that it is impossible to cover the synchronizing frequency range, which is several times as large as that. In view of this, separately from the AFC circuit, it is necessary to control the freerunning frequency itself of the horizontal oscillation circuit such that it substantially coincides with the horizontal synchronizing frequency. Such a method will be described with reference to FIG. 8. FIG. 8 is a block diagram showing a third example of the conventional synchronous processing device.
The third example of the conventional synchronous processing device shown in FIG. 8 is composed of an AFC circuit 9, a control sensitivity regulator 10, etc., the AFC circuit 9 being composed of a phase comparator 2, an integrator 3, etc.
An input horizontal synchronizing signal is input to the AFC circuit 9, and a freerunning frequency setting voltage is input to the control sensitivity regulator 10. Here, the freerunning frequency setting voltage is obtained, for example, from the output of the FV conversion circuit 1ashown in FIG. 6. The AFC circuit 9 performs phase comparison of the input horizontal synchronizing signal and the synchronizing frequency fed back from the horizontal oscillation circuit, and controls the horizontal oscillation circuit 4 in accordance with this comparison output. The control sensitivity regulator 10 performs control sensitivity regulation such that coincidence is achieved in the relationship between the absolute value of the oscillation frequency of the horizontal oscillation circuit 4 and the freerunning frequency setting voltage. That is, it is difficult to construct the horizontal oscillation circuit 4 such that oscillation is effected in proportion to the freerunning frequency setting voltage, and, by providing the control sensitivity regulator 10, the horizontal oscillation circuit 4 is caused to perform oscillating operation in proportion to the freerunning frequency setting voltage. In this way, a control voltage proportional to the input synchronizing frequency obtained through generation of a horizontal synchronizing signal by the FV conversion circuit or the like is supplied as the freerunning frequency setting voltage, whereby it is possible to perform control such that the freerunning frequency responds to the input horizontal synchronizing frequency. However, when a control error is generated in the freerunning frequency or when the input synchronizing signal is a composite synchronizing signal including a vertical synchronizing signal, a vertical synchronizing component appears in the phase comparison output of the AFC circuit 9, resulting, for example, in the upper image portion being distorted.
The above-described first example of the conventional synchronous control device has the following problems regarding the synchronization stability with respect to noises, etc., accuracy in synchronizing frequency control, etc.:
(1) If noises, etc. are included in the input synchronizing signal, the output voltage of the FV conversion circuit fluctuates due to the noises, so that, in the horizontal synchronizing system, the display image is affected by a phenomenon such as image distortion. Further, when the input image signal is momentarily interrupted by the switching of he input image signal or the like, the output voltage of the FV conversion circuit greatly fluctuates, so that the synchronization immediately after the restoration of the input image signal to the normal condition is greatly disturbed, and the synchronization drawing time is delayed, with the result that the stability in synchronization deteriorates. PA0 (2) Since it is difficult to prepare an oscillation circuit in which the voltage-frequency control characteristics are completely linear, the oscillation circuit has a predetermined non-linearity. As described above, the FV conversion output is faithfully proportional to the input frequency, so that the non-linear component of the oscillation circuit appears as a control error. Such a control error increases in proportion to the covered range of frequency, so that it is difficult to obtain a wide synchronizing frequency range.
In the second example of the conventional synchronous processing device, the problem at the time of reproduction of a standard television signal source is solved due to the above-described construction. However, in the case of the reproduction of a non-standard television signal source, there is a fear of malfunction occurring. That is, in a non-standard television signal source in conformity with a standard television signal such as a scan converter apparatus for converting the synchronizing frequency of a television signal to double the speed or a new image source such as a high-definition television, the possibility of these image sources including noises is the same as that in the case of the standard television signal source, so that when it is controlled by an automatic synchronization control circuit, there is a fear of the synchronization becoming unstable due to noises or the like. Thus, also in the case of a non-standard television signal source, there are many cases in which noises intrude even in the case of a non-standard television signal source, and it appears that such cases will increase more and more.
In the third example of the conventional synchronous processing device, the relationship of the absolute value of the oscillation frequency with respect to the control voltage of the oscillation circuit has variation in control sensitivity and non-linearity in control characteristics to a considerable degree. Thus, in the above-described third example of the prior art, the control sensitivity must be regulated for each circuit for the purpose of attaining coincidence in the relationship of the oscillation frequency with respect to given control voltage. Further, even when control sensitivity is regulated, it is impossible to perform high-accuracy control over the entire frequency range due to the presence of errors due to the non-linear components of the control characteristics, so that there are cases in which control errors of several % are generated. If the magnitude of these errors is within the AFC drawing range, there is no fear of synchronism being lost. However, from the viewpoint of performance such as image quality and stability in synchronization, the synchronization by AFC alone is not sufficient. Even in the usual television broadcasting, etc., the freerunning frequency is set to an accuracy of approximately 0.4%. Thus, an error in setting of as large as several % will result in the noise removal effect, for which the AFC circuit is intended, being deteriorated accordingly. Thus, the freerunning frequency must be adjusted as correctly as possible. However, it depends upon the characteristics of the analog circuit, so that it is difficult to achieve an improvement in control accuracy. In particular, when a wide frequency range is to be covered, this error cannot be accepted.